PartBuilder:Lattice CPLD:Using Pinout Spreadsheets From Latticesemi.com Website

05/07/2021 | 06:20

here we show how to build a lattice symbol using PartBuilders LATTICE_PHYSICAL_FLOW. First we cover how to get the required spreadsheet from the lattice website

PartBuilder:Lattice CPLD:Creating Pinout Spreadsheet from Lattice Diamond Tool

05/08/2021 | 03:46

here we build a 756 Pin Lattice FPGA the LFE5U_85F_xBG756 device. We first create the Pinout Spreadsheet (or Package file) for PartBuilder using the Lattice Diamond tool

PartBuilder:Lattice CPLD:Optimizing the SDL created by SmartFrac

05/08/2021 | 12:00

here we use the SDL Editor to modify the SDL that Smart-FRAC created to optimize the way we want to create the CPLD symbols...

PartBuilder:Lattice CPLD: Using SDL Replicate Loop to generate Bank Symbols

05/08/2021 | 10:24

here we show how we can use a replicate loop to apply the symbol layout we created for banks 0 and 1 to all the remaining banks in the part